Voume 2 : Issue 2

Digit Serial Implementation of Lifting Scheme for Discrete Wavelet Transform

Authors : VijayaBala N., Shanmugalakshmi R.



To enhance the performance of JPEG, the still image compression standard, JPEG 2000 evolved. In addition to improving the chip area, throughput, and power saving, reducing latency is of paramount importance with demands for faster communication increasing day by day. This paper explores the effectiveness of Digit serial Implementations of Lifting Scheme. Digit serial architectures have the advantage of fewer hardware resources when precision is aimed by considering more bits for coefficient representations. When compared to the other technique called Bit parallel (BP) architecture the digital serial (DS) architecture is area efficient. Simulations of the proposed work were carried out using Models in VHDL with behavioral modeling. Synthesis of the architecture was carried out using Xilinx project Navigator. Parameters like area and time delay are found to be comparably less for DS than BP from utilization summary.